CXL SIG led by Pankaj Mehra

Special Interest Group on new Compute eXpress Link protocols atop the memory-optimized PCIe 5 phy. We focus broadly on topics such as disaggregated memory and coherent accelerators, studying the related evolution of processors and operating systems, and understanding how workloads will (evolve to) benefit from the rise of far memory and computational memory enabled by CXL.

This group includes external (industry) participants.

Tuesday, March 19, 2024 at 2:00 PM


Material from the event

CRSS Contact:
Mehra, Pankaj

Last modified 14 Mar 2024